ENET4000: 15Gbps Access Flow Processor

ENET4000: 15Gbps Access Flow Processor:

ENET 4000介绍

The ENET4000 15Gbps Access Flow Processor is a family of high performance configurable flow processor and traffic manager solutions optimized for the Metro Access Market.

ENET4000 provides the required flexibility for L2/L3 protocols as RISC base network processor, with deterministic wire speed performance achieved by using dedicated Atomic networking engines.

ENET4000 is based on a atomic engines pipeline architecture, and supports wire speed performance of up to 15Gbps on stratix FPGA and 30Gbps on Hard copy version, with software configurable L2 to L5 protocol interworking, hierarchical multi field classification and flow Identification, forwarding, hierarchical policing, performance monitoring, packet editing, scheduling and shaping.

The ENET4000 protocol interworking includes software support for packet editing, which provide the ability to receive packets in any format and change the protocol per virtual output port to any other protocol, hence can support GFP, Ethernet II, SNAP, Q-in-Q, MAC-in-MAC, MPLS, PPP, PPPoE , PPPoA ,HDLC, L2TP, AAL5 or any type of L2 protocol

产品特色/产品技术 (Features/Technology)

15Gbps Access Flow Processor integrating flexible interfaces up to 20Gbps including XAUI, SGMII, RGMII, SPI-4
Deterministic 15Gbps throughput
On the fly encapsulation and packet anaylizing
Classify streams based on four configurable fields with four hierarchies
Huge paramater search engine data base through a single DDR, supporting up 256,000 entries for L2&L3, multicast, classification tables and 32 configurable search tables
Up to 64,000 buffers
Wire Speed Multicast
Unlimited Multicast groups
MEF compliance policing per flow with 64Kbps granularity and up to 16K streams.
Software Programmable / Configurable Protocol interworking and packet editing including AAL5, MAC in MAC, QTAG, MPLS, PPPoE, PPPoA and inverse multiplexing
Hierarchical QoS with 3-5 hierarchies supporting WFQ, shaping, WRED and up to 16K queues
Management is performed through , generic Motorola CPU interface, MII , or optional integrated CPU
Quality of Service (QoS) support, Including 4-8 priority queues per queue cluster.

系统方块图 (System Block)